Norazizi Sayuti


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Open Topics for Master/PhD Candidates


Uncertainty-Aware Design Space Exploration (DSE) of Networks-On-Chip (NoC) for Hard Real-Time Embedded Systems

Networks-On-Chip (NoC) is seen as a new network paradigm for addressing the limitation of the current bus-based communication in multi-core embedded systems. Some of these systems are designed for executing hard real-time services in flight and automotive controls. But the current state-of-the-art design space exploration techniques lack uncertainty assessments. The risks that uncertainty imposes on the system’s safety have huge impacts on its predictability. For this reason, the current work on DSE is focusing on the uncertainty analysis of the systems, and to apply it in the DSE of Networks-on-Chip (NoC) based multi-processor systems.


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